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 INTEGRATED CIRCUITS
DATA SHEET
TEA1110A Low voltage versatile telephone transmission circuit with dialler interface
Product specification Supersedes data of 1997 Apr 22 File under Integrated Circuits, IC03 2000 Feb 15
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface
FEATURES * Low DC line voltage; operates down to 1.6 V (excluding voltage drop over external polarity guard) * Voltage regulator with adjustable DC voltage * Provides a supply for external circuits * Symmetrical high impedance inputs (64 k) for dynamic, magnetic or piezo-electric microphones * Asymmetrical high impedance input (32 k) for electret microphones * DTMF input with confidence tone * MUTE input for pulse or DTMF dialling * Receiving amplifier for dynamic, magnetic or piezo-electric earpieces * AGC line loss compensation for microphone and earpiece amplifiers. QUICK REFERENCE DATA Iline = 15 mA; VEE = 0 V; RSLPE = 20 ; AGC pin connected to VEE; Zline = 600 ; f = 1 kHz; Tamb = 25 C for TEA1110A(T); Tj = 25 C for TEA1110AUH; unless otherwise specified. SYMBOL Iline VLN ICC VCC Gvtrx PARAMETER line current operating range DC line voltage internal current consumption supply voltage for peripherals typical voltage gain microphone amplifier (not adjustable) receiving amplifier range Gvtrx VMIC = 4 mV (RMS) VIR = 4 mV (RMS) - 19 - 43.7 - 5.9 VCC = 2.9 V IP = 0 mA CONDITIONS normal operation MIN. 11 3.35 - - GENERAL DESCRIPTION APPLICATION
TEA1110A
* Line powered telephone sets, cordless telephones, fax machines, answering machines.
The TEA1110A is a bipolar integrated circuit that performs all speech and line interface functions required in fully electronic telephone sets. It performs electronic switching between speech and dialling. The IC operates at a line voltage down to 1.6 V DC (with reduced performance) to facilitate the use of telephone sets connected in parallel. All statements and values refer to all versions unless otherwise specified.
TYP. - - 3.65 1.1 2.9
MAX. 140 11 3.95 1.4 - - 33 -
UNIT mA mA V mA V dB dB dB
with reduced performance 1
gain control range for microphone and Iline = 85 mA receiving amplifiers with respect to Iline = 15 mA gain reduction for microphone and receiving amplifiers MUTE = LOW
Gvtrxm
-
80
-
dB
ORDERING INFORMATION TYPE NUMBER TEA1110A TEA1110AT TEA1110AUH PACKAGE NAME DIP14 SO14 - DESCRIPTION plastic dual in-line package; 14 leads (300 mil) plastic small outline package; 14 leads; body width 3.9 mm bare die; on foil VERSION SOT27-1 SOT108-1 -
2000 Feb 15
2
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface
BLOCK DIAGRAM
TEA1110A
handbook, full pagewidth
GAR 13 IR 7
V I
QR 12
MUTE 6 14 VCC
V
I
1 LN
DTMF
5
ATT.
V I
CURRENT REFERENCE
MIC+
10 3 REG 9
V I
MIC-
AGC CIRCUIT
LOW VOLTAGE CIRCUIT
TEA1110A(T)
11
8
2 SLPE
VEE
AGC
MGG736
Fig.1 Block diagram.
2000 Feb 15
3
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface
PINNING PIN SYMBOL TEA1110A(T) LN SLPE REG n.c. DTMF MUTE IR AGC MIC- MIC+ VEE QR GAR VCC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 TEA1110AUH 1 2 3 4 5 6 7 8 9 10 11 12 13 14 positive line terminal slope (DC resistance) adjustment line voltage regulator decoupling not connected dual-tone multi-frequency input PAD DESCRIPTION
TEA1110A
mute input to select speech or dialling mode (active LOW) receiving amplifier input automatic gain control/ line loss compensation inverting microphone amplifier input non-inverting microphone amplifier input negative line terminal earpiece amplifier output earpiece amplifier gain adjustment supply voltage for internal circuit
handbook, halfpage
LN SLPE REG n.c. DTMF MUTE IR
1 2 3
14 VCC 13 GAR 12 QR
4 TEA1110A(T) 11 VEE 5 6 7
MGG735
10 MIC+ 9 MIC-
8 AGC
Fig.2 Pin configuration.
2000 Feb 15
4
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface
FUNCTIONAL DESCRIPTION All data given in this chapter are typical values, except when otherwise specified. Supply (pins LN, SLPE, VCC and REG) The supply for the TEA1110A and its peripherals is obtained from the telephone line; see Fig.3. The IC generates a stabilized reference voltage (Vref) between pins LN and SLPE. Vref is temperature compensated and can be adjusted by means of an external resistor (RVA). Vref equals 3.35 V and can be increased by connecting RVA between pins REG and SLPE (see Fig.4), or decreased by connecting RVA between pins REG and LN. The voltage at pin REG is used by the internal regulator to generate Vref and is decoupled by CREG, which is connected to VEE. This capacitor, converted into an equivalent inductance (see Section "Set impedance"), realizes the set impedance conversion from its DC value (RSLPE) to its AC value (RCC in the audio-frequency range). The voltage at pin SLPE is proportional to the line current. The voltage at pin LN is: V LN = V ref + R SLPE x I SLPE I SLPE = I line - I CC - I P - I Where: Iline = line current ICC = current consumption of the IC
TEA1110A
IP = supply current for peripheral circuits I* = current consumed between LN and VEE. The preferred value for RSLPE is 20 . Changing RSLPE will affect more than the DC characteristics; it also influences the microphone and DTMF gains, the gain control characteristics, the sidetone level and the maximum output swing on the line.
handbook, full pagewidth
Rline Iline
RCC 619 LN 1 from pre amp VCC 14 IP ICC I* CVCC 100 F peripheral circuits
Rexch
Ish
Vexch
Vd
TEA1110A
2 SLPE ISLPE RSLPE 20 3 REG CREG 4.7 F
MGG737
11 VEE
Fig.3 Supply configuration.
2000 Feb 15
5
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface
The internal circuitry of the TEA1110A is supplied from pin VCC. This voltage supply is derived from the line voltage by means of a resistor (RCC) and must be decoupled by a capacitor CVCC. It may also be used to supply peripheral circuits such as dialling or control circuits. The VCC voltage depends on the current consumed by the IC and the peripheral circuits as shown by the formula: V CC = V CC0 - R CCint x ( I P - I rec ) V CC0 = V LN - R CC x I CC (see also Figs 5 and 6). RCCint is the internal equivalent resistance of the voltage supply, and Irec is the current consumed by the output stage of the earpiece amplifier. The DC line current flowing into the set is determined by the exchange supply voltage (Vexch), the feeding bridge resistance (Rexch), the DC resistance of the telephone line (Rline) and the reference voltage (Vref). With line currents below 7.5 mA, the internal reference voltage (generating Vref) is automatically adjusted to a lower value. This means that more sets can operate in parallel with DC line voltages (excluding the polarity guard) down to an absolute minimum voltage of 1.6 V. At currents below 7.5 mA, the circuit has limited sending and receiving levels. This is called the low voltage area. Set impedance
TEA1110A
In the audio frequency range, the dynamic impedance is mainly determined by the RCC resistor. The equivalent impedance of the circuit is illustrated in Fig.7. Microphone amplifier (pins MIC+ and MIC-) The TEA1110A has symmetrical microphone inputs. The input impedance between pins MIC+ and MIC- is 64 k (2 x 32 k). The voltage gain from pins MIC+/MIC- to pin LN is set at 43.7 dB (typ). Automatic gain control is provided on this amplifier for line loss compensation. Receiving amplifier (pins IR, GAR and QR) The receiving amplifier has one input (IR) and one output (QR). The input impedance between pin IR and pin VEE is 20 k. The voltage gain from pin IR to pin QR is set at 33 dB (typ). The gain can be decreased by connecting an external resistor RGAR between pins GAR and QR; the adjustment range is 14 dB. Two external capacitors CGAR (connected between GAR and QR) and CGARS (connected between GAR and VEE) ensure stability. The CGAR capacitor provides a first-order low-pass filter. The cut-off frequency corresponds to the time constant CGAR x (RGARint // RGAR). RGARint is the internal resistor which sets the gain with a typical value of 125 k. The condition CGARS = 10 x CGAR must be fulfilled to ensure stability. The output voltage of the receiving amplifier is specified for continuous wave drive. The maximum output swing depends on the DC line voltage, the RCC resistor, the ICC current consumption of the circuit, the IP current consumption of the peripheral circuits and the load impedance. Automatic gain control is provided on this amplifier for line loss compensation.
MGD176
handbook, halfpage
6.0
Vref (V)
5.0
4.0
Automatic gain control (pin AGC)
(1) (2)
3.0 104
105
106
RVA ()
107
(1) Influence of RVA on Vref. (2) Vref without influence of RVA.
Fig.4 Reference voltage adjustment by RVA.
The TEA1110A performs automatic line loss compensation. The automatic gain control varies the gain of the microphone amplifier and the gain of the receiving amplifier in accordance with the DC line current. The control range is 5.9 dB (which corresponds approximately to a line length of 5 km for a 0.5 mm diameter twisted-pair copper cable with a DC resistance of 176 /km and an average attenuation of 1.2 dB/km). The IC can be used with different configurations of feeding bridge (supply voltage and bridge resistance) by connecting an external resistor RAGC between pins AGC and VEE. 6
2000 Feb 15
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface
This resistor enables the Istart and Istop line currents to be increased (the ratio between Istart and Istop is not affected by the resistor). The AGC function is disabled when pin AGC is left open-circuit. Mute function (pin MUTE) The mute function performs the switching between the speech mode and the dialling mode. When MUTE is LOW, the DTMF input is enabled and the microphone and receiving amplifiers inputs are disabled. When MUTE is HIGH, the microphone and receiving amplifiers inputs are enabled while the DTMF input is disabled. A pull-up resistor is included at the input. DTMF amplifier (pin DTMF) When the DTMF amplifier is enabled, dialling tones may be sent on line. These tones can be heard in the earpiece at a low level (confidence tone). The TEA1110A has an asymmetrical DTMF input. The input impedance between DTMF and VEE is 20 k. The voltage gain from pin DTMF to pin LN is 25.3 dB. The automatic gain control has no effect on the DTMF amplifier.
0 0 1 2 3
TEA1110A
handbook, halfpage
2.5
MBE783
IP (mA) 2
1.5
1
0.5
(2)
(1)
VCC (V)
4
(1) With RVA resistor. (2) Without RVA resistor.
Fig.5 Typical current IP available from VCC for peripheral circuits at Iline = 15 mA.
handbook, halfpage
handbook, halfpage
LN RP REG CREG 4.7 F RCC 619 VCC CVCC 100 F
MBE788
RCCint
VCC LEQ Vref IP SLPE RSLPE
MBE792
VCCO
Irec
PERIPHERAL CIRCUIT
20 VEE
VEE
Leq = CREG x RSLPE x RP. RP = internal resistance. RP = 15.5 k.
Fig.7 Fig.6 VCC supply voltage for peripherals.
Equivalent impedance between LN and VEE.
2000 Feb 15
7
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface
SIDETONE SUPPRESSION The TEA1110A anti-sidetone network comprising RCC//Zline, Rast1, Rast2, Rast3, RSLPE and Zbal (see Fig.8 ) suppresses the transmitted signal in the earpiece. Maximum compensation is obtained when the following conditions are fulfilled: R SLPE x R ast1 = R CC x ( R ast2 + R ast3 ) ( R ast2 x ( R ast3 + R SLPE ) ) k = -----------------------------------------------------------------( R ast1 x R SLPE ) Z bal = k x Z line The scale factor k is chosen to meet the compatibility with a standard capacitor from the E6 or E12 range for Zbal. In practice, Zline varies considerably with the line type and the line length. Therefore, the value of Zbal should be for an average line length which gives satisfactory sidetone suppression with short and long lines. The suppression also depends on the accuracy of the match between Zbal and the impedance of the average line.
TEA1110A
The anti-sidetone network for the TEA1110A (as shown in Fig.13) attenuates the receiving signal from the line by 32 dB before it enters the receiving amplifier. The attenuation is almost constant over the whole audio frequency range. A Wheatstone bridge configuration (see Fig.9) may also be used. More information on the balancing of an anti-sidetone bridge can be obtained in our publication "Applications Handbook for Wired Telecom Systems, IC03b", order number 9397 750 00811.
handbook, full pagewidth
LN
Zline
RCC
Rast1
VEE
Im
IR Zir Rast2
RSLPE Rast3 SLPE Zbal
MBE787
Fig.8 Equivalent circuit of TEA1110A family anti-sidetone bridge.
2000 Feb 15
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Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface
TEA1110A
handbook, full pagewidth
LN
Zline
RCC
Zbal
VEE
Im
IR Zir
RSLPE
Rast1 RA SLPE
MBE786
Fig.9 Equivalent circuit of an anti-sidetone network in a Wheatstone bridge configuration.
2000 Feb 15
9
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL VLN PARAMETER positive continuous line voltage repetitive line voltage during switch-on or line interruption Vn(max) Iline Ptot maximum voltage on all pins line current total power dissipation TEA1110A TEA1110AT TEA1110AUH; note 1 Tstg Tamb Tj Note storage temperature operating ambient temperature junction temperature CONDITIONS MIN. VEE - 0.4 VEE - 0.4 VEE - 0.4 RSLPE = 20 ; - see Figs 10 and 11 Tamb = 75 C; see Figs 10 and 11 - - - -40 -25 - 12 13.2
TEA1110A
MAX. V V V
UNIT
VCC + 0.4 140
mA
588 384 - +125 +75 +125
mW mW mW C C C
1. Mostly dependent on the maximum required ambient temperature, on the voltage between LN and SLPE and on the thermal resistance between die ambient temperature. This thermal resistance depends on the application board layout and on the materials used. Figure 12 shows the safe operating area versus this thermal resistance for ambient temperature Tamb = 75 C HANDLING This device meets class 2 ESD test requirements [Human Body Model (HBM)], in accordance with "MIL STD 883C - method 3015". THERMAL CHARACTERISTICS SYMBOL Rth(j-a) PARAMETER thermal resistance from junction to ambient; mounted on epoxy board 40.1 x 19.1 x 1.5 mm TEA1110A TEA1110AT TEA1110AUH CONDITIONS in free air VALUE UNIT
85 130 tbf by customer in application
K/W K/W K/W
2000 Feb 15
10
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface
TEA1110A
MBH275
handbook, halfpage
150
I line
(mA) 130
110 (1) 90 (2) (3) 70 (4)
50
30 2 (1) Tamb = 45 C; Ptot = 0.615 W. (2) Tamb = 55 C; Ptot = 0.538 W. (3) Tamb = 65 C; Ptot = 0.461 W. (4) Tamb = 75 C; Ptot = 0.384 W. 4 6 8 10 12 V LN V SLPE (V)
Fig.10 SO14 Safe operating area (TEA1110AT).
handbook, halfpage I
150 line (mA) 130
MGD859
(1)
110
(2) (3) (4)
90
70
(5)
50
30 2 (1) (2) (3) (4) (5) Tamb = 35 C; Ptot = 1.058 W. Tamb = 45 C; Ptot = 0.941 W. Tamb = 55 C; Ptot = 0.823 W. Tamb = 65 C; Ptot = 0.705 W. Tamb = 75 C; Ptot = 0.588 W. 4 6 8 10 12 VLN_VSLPE(V)
Fig.11 DIP14 Safe operating area (TEA1110A).
2000 Feb 15
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Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface
TEA1110A
handbook, full pagewidth
160
FCA160
I line (mA) 120
(2) (3) (4) (5) (6) (7)
(1)
80
40
0 2 4 6 8 10 VSLPE (V) 12
LINE (1) (2) (3) (4) (5) (6) (7) Fig.12 Safe operating area at Tamb = 75 C (TEA1110AUH).
Rth(j-a) (K/W) 40 50 60 75 90 105 130
2000 Feb 15
12
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface
CHARACTERISTICS Iline = 15 mA; VEE = 0 V; RSLPE = 20 ; AGC pin connected to VEE; Zline = 600 ; f = 1 kHz; Tamb = 25 C for TEA1110A(T); Tj = 25 C for TEA1110AUH; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP.
TEA1110A
MAX.
UNIT
Supplies (pins VLN, VCC, SLPE and REG) Vref VLN stabilized voltage between LN and SLPE DC line voltage Iline = 1 mA Iline = 4 mA Iline = 15 mA Iline = 140 mA VLN(exR) VLN(T) ICC VCC RCCint DC line voltage with an external resistor RVA DC line voltage variation with temperature referred to 25 C internal current consumption supply voltage for peripherals equivalent supply voltage resistance RVA(SLPE-REG) = 27 k Tamb = -25 to +75 C VCC = 2.9 V IP = 0 mA IP = 0.5 mA 3.1 - - 3.35 - - - - - - 3.35 1.6 2.3 3.65 - 4.4 30 1.1 2.9 550 3.6 - - 3.95 6.9 - - 1.4 - 620 V V V V V V mV mA V
Microphone amplifier (pins MIC+ and MIC-) Zi input impedance differential between pins MIC+ and MIC- single-ended between pins MIC+/MIC- and VEE Gvtx Gvtx(f) Gvtx(T) CMRR VLN(max)(rms) Vnotx voltage gain from MIC+/MIC- to LN gain variation with frequency referred to 1 kHz gain variation with temperature referred to 25 C common mode rejection ratio maximum sending signal (RMS value) Iline = 15 mA; THD = 2% Iline = 4 mA, THD = 10% VMIC = 4 mV (RMS) f = 300 to 3400 Hz Tamb = -25 to +75 C - - 42.7 - - - 1.4 - - 64 32 43.7 0.2 0.3 80 1.7 0.8 - - 44.7 - - - - - k k dB dB dB dB V V dBmp
noise output voltage at pin LN; pins psophometrically MIC+/MIC- shorted through 200 weighted (P53 curve) input impedance voltage gain from IR to QR gain variation with frequency referred to 1 kHz gain variation with temperature referred to 25 C VIR = 4 mV (RMS) f = 300 to 3400 Hz Tamb = -25 to +75 C
-78.5 -
Receiving amplifier (pins IR, QR and GAR) Zi Gvrx Gvrx(f) Gvrx(T) - 32 - - 20 33 0.2 0.3 - 34 - - k dB dB dB
2000 Feb 15
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Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface
SYMBOL Gvrxr PARAMETER gain voltage reduction range CONDITIONS external resistor connected between GAR and QR - MIN. TYP. -
TEA1110A
MAX. 14
UNIT dB
Vo(rms)
maximum receiving signal (RMS value)
IP = 0 mA sine wave drive; - RL = 150 ; THD = 2% IP = 0 mA sine wave drive; - RL = 450 ; THD = 2%
0.25 0.35 -87
- - -
V V dBVp
Vnorx(rms)
noise output voltage at pin QR (RMS value)
Gvrx = 33 dB; IR open-circuit; RL = 150 ; psophometrically weighted (P53 curve)
-
Automatic gain control (pin AGC) Gvtrx gain control range for microphone and receiving amplifiers with respect to Iline = 15 mA highest line current for maximum gain lowest line current for minimum gain Iline = 85 mA - 5.9 - dB
Istart Istop
- -
23 56
- -
mA mA
DTMF amplifier (pin DTMF) Zi Gvdtmf Gvdtmf(f) Gvdtmf(T) Gvct input impedance voltage gain from DTMF to LN gain variation with frequency referred to 1 kHz gain variation with temperature referred to 25 C voltage gain from DTMF to QR (confidence tone) VDTMF = 20 mV (RMS); MUTE = LOW f = 300 to 3400 Hz Tamb = -25 to +75 C VDTMF = 20 mV (RMS); RL = 150 - 24.1 - - - 20 25.3 0.2 0.4 -15 - 26.5 - - - k dB dB dB dB
Mute function (pin MUTE) VIL VIH IMUTE Gvtrxm LOW level input voltage HIGH level input voltage input current gain reduction for microphone and receiving amplifiers MUTE = LOW VEE - 0.4 - VEE + 1.5 - - - 1.5 80 VEE + 0.3 V VCC + 0.4 V - - A dB
2000 Feb 15
14
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Rprotect 10 a/b VDR 95 V telephone line 4x BAS11 Rast2 3.92 k CGAR 100 pF GAR MIC+ CGARS b/a 1 nF BZX79C10 Rast3 390 Zbal MIC- SLPE REG AGC VEE 100 F CVCC Rast1 130 k CIR IR QR VCC DTMF MUTE signal from dial and control circuits supply for peripheral circuits Rpd6 BF473 BC547 68 k PD input Rpd4 BC558 470 k Rpd5 470 k LN
APPLICATION INFORMATION
Philips Semiconductors
TEA1110A(T)
handbook, full pagewidth
Low voltage versatile telephone transmission circuit with dialler interface
RCC 619
15
BSN254 Rlimit 3.9
RSLPE 20
CREG 4.7 F
Rpd1 470 k BC547 BZX79C10 Rpd2 470 k Rpd3 1 M
MGG738
Product specification
TEA1110A
Fig.13 Typical application of the TEA1110A in sets with Pulse Dialling or Flash facilities.
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface
BONDING PAD LOCATIONS FOR TEA1110AUH
TEA1110A
All x/y coordinates represent the position of the centre of the pad (in m) with respect to the origin (x/y = 0/0) of the die (see Fig.14). The size of all pads is 80 m x 80 m. COORDINATES SYMBOL LN SLPE REG n.c. DTMF MUTE IR AGC MIC- MIC+ VEE QR GAR VCC PAD x 1 2 3 4 5 6 7 8 9 10 11 12 13 14 123 251 490.2 685 1174 1450 1449 1449.2 1297 1108 678 318.2 123 123 y 782 459 459 459 459 459 664 1006.8 1200 1200 1200 1200.2 1201 1017.8
handbook, full pagewidth
GAR 13
QR 12
VEE 11
MIC+ 10
MIC- 9
VCC
14
8
AGC
LN
1 7 IR
2 x 0,0 y SLPE
3 REG
4 n.c.
5 DTMF
6 MUTE
FCA157
Fig.14 TEA1110AUH bonding pad locations.
2000 Feb 15
16
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface
PACKAGE OUTLINES DIP14: plastic dual in-line package; 14 leads (300 mil)
TEA1110A
SOT27-1
D seating plane
ME
A2
A
L
A1
c Z e b1 b 14 8 MH wM (e 1)
pin 1 index E
1
7
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT27-1 REFERENCES IEC 050G04 JEDEC MO-001 EIAJ SC-501-14 EUROPEAN PROJECTION A max. 4.2 0.17 A1 min. 0.51 0.020 A2 max. 3.2 0.13 b 1.73 1.13 0.068 0.044 b1 0.53 0.38 0.021 0.015 c 0.36 0.23 0.014 0.009 D (1) 19.50 18.55 0.77 0.73 E (1) 6.48 6.20 0.26 0.24 e 2.54 0.10 e1 7.62 0.30 L 3.60 3.05 0.14 0.12 ME 8.25 7.80 0.32 0.31 MH 10.0 8.3 0.39 0.33 w 0.254 0.01 Z (1) max. 2.2 0.087
ISSUE DATE 95-03-11 99-12-27
2000 Feb 15
17
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface
TEA1110A
SO14: plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
D
E
A X
c y HE vMA
Z 14 8
Q A2 A1 pin 1 index Lp 1 e bp 7 wM L detail X (A 3) A
0
2.5 scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm A max. 1.75 A1 0.25 0.10 A2 1.45 1.25 A3 0.25 0.01 bp 0.49 0.36 c 0.25 0.19 D (1) 8.75 8.55 E (1) 4.0 3.8 0.16 0.15 e 1.27 0.050 HE 6.2 5.8 L 1.05 Lp 1.0 0.4 Q 0.7 0.6 0.028 0.024 v 0.25 0.01 w 0.25 0.01 y 0.1 0.004 Z (1) 0.7 0.3 0.028 0.012
inches 0.069
0.010 0.057 0.004 0.049
0.019 0.0100 0.35 0.014 0.0075 0.34
0.244 0.039 0.041 0.228 0.016
8 0o
o
Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT108-1 REFERENCES IEC 076E06 JEDEC MS-012 EIAJ EUROPEAN PROJECTION
ISSUE DATE 97-05-22 99-12-27
2000 Feb 15
18
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface
SOLDERING Introduction This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 652 90011). There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mount components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. Through-hole mount packages SOLDERING BY DIPPING OR BY SOLDER WAVE The maximum permissible temperature of the solder is 260 C; solder at this temperature must not be in contact with the joints for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg(max)). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. MANUAL SOLDERING Apply the soldering iron (24 V or less) to the lead(s) of the package, either below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 C, contact may be up to 5 seconds. Surface mount packages REFLOW SOLDERING Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. 2000 Feb 15 19
TEA1110A
Typical reflow peak temperatures range from 215 to 250 C. The top-surface temperature of the packages should preferable be kept below 230 C. WAVE SOLDERING Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results: * Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. * For packages with leads on two sides and a pitch (e): - larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; - smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. * For packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. MANUAL SOLDERING Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C.
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface
TEA1110A
When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C. Suitability of IC packages for wave, reflow and dipping soldering methods SOLDERING METHOD MOUNTING PACKAGE WAVE Through-hole mount DBS, DIP, HDIP, SDIP, SIL Surface mount BGA, LFBGA, SQFP, TFBGA HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS PLCC(4), SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO Notes 1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the "Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods". 2. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board. 3. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 4. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 5. Wave soldering is only suitable for LQFP, QFP and TQFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 6. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. suitable(2) not suitable not suitable(3) suitable not recommended(4)(5) not recommended(6) REFLOW(1) DIPPING - suitable suitable suitable suitable suitable suitable - - - - -
2000 Feb 15
20
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface
DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
TEA1110A
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. BARE DIE DISCLAIMER All die are tested and are guaranteed to comply with all data sheet limits up to the point of wafer sawing for a period of ninety (90) days from the date of Philips' delivery. If there are data sheet limits not guaranteed, these will be separately indicated in the data sheet. There is no post waffle pack testing performed on individual die. Although the most modern processes are utilized for wafer sawing and die pick and place into waffle pack carriers, Philips Semiconductors has no control of third party procedures in the handling, packing or assembly of the die. Accordingly, Philips Semiconductors assumes no liability for device functionality or performance of the die or systems after handling, packing or assembly of the die. It is the responsibility of the customer to test and qualify their application in which the die is used.
2000 Feb 15
21
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface
NOTES
TEA1110A
2000 Feb 15
22
Philips Semiconductors
Product specification
Low voltage versatile telephone transmission circuit with dialler interface
NOTES
TEA1110A
2000 Feb 15
23
Philips Semiconductors - a worldwide company
Argentina: see South America Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140, Tel. +61 2 9704 8141, Fax. +61 2 9704 8139 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 1 60 101 1248, Fax. +43 1 60 101 1210 Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6, 220050 MINSK, Tel. +375 172 20 0733, Fax. +375 172 20 0773 Belgium: see The Netherlands Brazil: see South America Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor, 51 James Bourchier Blvd., 1407 SOFIA, Tel. +359 2 68 9211, Fax. +359 2 68 9102 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS, Tel. +1 800 234 7381, Fax. +1 800 943 0087 China/Hong Kong: 501 Hong Kong Industrial Technology Centre, 72 Tat Chee Avenue, Kowloon Tong, HONG KONG, Tel. +852 2319 7888, Fax. +852 2319 7700 Colombia: see South America Czech Republic: see Austria Denmark: Sydhavnsgade 23, 1780 COPENHAGEN V, Tel. +45 33 29 3333, Fax. +45 33 29 3905 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. +358 9 615 800, Fax. +358 9 6158 0920 France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex, Tel. +33 1 4099 6161, Fax. +33 1 4099 6427 Germany: Hammerbrookstrae 69, D-20097 HAMBURG, Tel. +49 40 2353 60, Fax. +49 40 2353 6300 Hungary: see Austria India: Philips INDIA Ltd, Band Box Building, 2nd floor, 254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025, Tel. +91 22 493 8541, Fax. +91 22 493 0966 Indonesia: PT Philips Development Corporation, Semiconductors Division, Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510, Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080 Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007 Italy: PHILIPS SEMICONDUCTORS, Via Casati, 23 - 20052 MONZA (MI), Tel. +39 039 203 6838, Fax +39 039 203 6800 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5057 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +9-5 800 234 7381, Fax +9-5 800 943 0087 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Pakistan: see Singapore Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Al.Jerozolimskie 195 B, 02-222 WARSAW, Tel. +48 22 5710 000, Fax. +48 22 5710 001 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 755 6918, Fax. +7 095 755 6919 Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 58088 Newville 2114, Tel. +27 11 471 5401, Fax. +27 11 471 5398 South America: Al. Vicente Pinzon, 173, 6th floor, 04547-130 SAO PAULO, SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 821 2382 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 93 301 6312, Fax. +34 93 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 5985 2000, Fax. +46 8 5985 2745 Switzerland: Allmendstrasse 140, CH-8027 ZURICH, Tel. +41 1 488 2741 Fax. +41 1 488 3263 Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1, TAIPEI, Taiwan Tel. +886 2 2134 2886, Fax. +886 2 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. +66 2 745 4090, Fax. +66 2 398 0793 Turkey: Yukari Dudullu, Org. San. Blg., 2.Cad. Nr. 28 81260 Umraniye, ISTANBUL, Tel. +90 216 522 1500, Fax. +90 216 522 1813 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 208 730 5000, Fax. +44 208 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381, Fax. +1 800 943 0087 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 3341 299, Fax.+381 11 3342 553
For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 2000
Internet: http://www.semiconductors.philips.com
SCA 69
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
403502/03/pp24
Date of release: 2000
Feb 15
Document order number:
9397 750 06724


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